Sputtering is a physical vapor deposition (PVD) process in which high-energy ions impact and erode a solid target and deposit the target material on the surface of a substrate such as a semiconductor substrate, a specific example being a silicon wafer. In semiconductor fabrication, the sputtering process is usually accomplished within a semiconductor fabrication chamber also known as a PVD process chamber or a sputtering chamber.
A sputtering chamber is used to sputter deposit material onto a substrate to manufacture electronic circuits, such as for example, integrated circuit chips and displays. Typically, the sputtering chamber comprises an enclosure wall that encloses a process zone into which a process gas is introduced, a gas energizer to energize the process gas, and an exhaust port to exhaust and control the pressure of the process gas in the chamber. The chamber is used to sputter deposit a material from a sputtering target onto the substrate, such as a metal, for example, aluminum, copper, tungsten or tantalum; or a metal compound such as tantalum nitride, tungsten nitride or titanium nitride. In the sputtering processes, the sputtering target is bombarded by energetic ions, such as a plasma, causing material to be knocked off the target and deposited as a film on the substrate.
A typical semiconductor fabrication chamber has a target assembly including disc-shaped target of solid metal or other material supported by a backing plate that holds the target. To promote uniform deposition, the PVD chamber may have an annular concentric metallic ring, which is often called a shield, circumferentially surrounding the disc-shaped target. The gap between the inner surface of the shield and the circumferential surface of the target is typically referred to as the darkspace gap.
FIGS. 1 and 2 illustrate prior art arrangements of a target assemblies used within a PVD chamber. FIG. 1 is a schematic, cross-sectional illustration of a prior art a semiconductor fabrication chamber 100 comprising a chamber body 102 and a substrate 104 supported by a substrate support 106 within the chamber body 102. A target assembly 111 includes a target 112 supported by a backing plate 114. The target includes a front face or sputterable area 120 of disposed in a spaced relationship with respect to the substrate support 106. A shield 108 comprising a generally annular shaped metal ring extends circumferentially around the target. The shield 108 is held in place in the chamber by a shield support 110. The front face 120 of the target 112 is substantially flat.
FIG. 2 shows another configuration of a prior art target assembly 211 including a backing plate 214 and a target 212 joined to the backing plate. The target 212 is in the form of a frustum, and is generally convex in shape having two inwardly beveled edges 213 such that the outer peripheral portion of the target has a thickness less than the central region of the target.
In recent development of semiconductor industry, especially in high dielectric constant and metal gate applications, there is a stringent requirement of good uniformity for thin films on the order of 1 to 5 Angstroms, which poses a challenge to the traditional physical vapor deposition (PVD). In magnetron sputtering with longer spacing from target surface to the wafer, the film at wafer central region tends to be much thicker than the other locations on the wafer, which prevents film thickness uniformity from being achieved. There is a desire to provide thin film sputtering systems that are capable of providing better uniformity in film thickness across the entire radius of substrates.